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Yi-Lin Chuang

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2008
3EEHsin-Chen Chen, Yi-Lin Chuang, Yao-Wen Chang, Yung-Chung Chang: Constraint graph-based macro placement for modern mixed-size circuit designs. ICCAD 2008: 218-223
2EETung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang: Effective Wire Models for X-Architecture Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 654-658 (2008)
2007
1EETung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang: X-architecture placement based on effective wire models. ISPD 2007: 87-94

Coauthor Index

1Yao-Wen Chang [1] [2] [3]
2Yung-Chung Chang [3]
3Hsin-Chen Chen [3]
4Tung-Chieh Chen [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)