| 2009 |
|---|
| 10 | EE | Po-Yuan Chen,
Kuan-Hsien Ho,
TingTing Hwang:
Skew-aware polarity assignment in clock tree.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
| 2008 |
|---|
| 9 | EE | Winston Yu-Chen Chen,
Po-Yuan Chen,
Calvin Yu-Chian Chen,
Jing-Gung Chung:
Exploring 3D-QSAR pharmacophore mapping of azaphenanthrenone derivatives for mPGES-1 inhibition Using HypoGen technique.
CIBCB 2008: 207-213 |
| 8 | EE | Po-Yuan Chen,
Che-Yu Liu,
TingTing Hwang:
Transition-aware decoupling-capacitor allocation in power noise reduction.
ICCAD 2008: 426-429 |
| 2007 |
|---|
| 7 | EE | Po-Yuan Chen,
Kuan-Hsien Ho,
TingTing Hwang:
Skew aware polarity assignment in clock tree.
ICCAD 2007: 376-379 |
| 6 | EE | Ching-Hsing Luo,
Po-Yuan Chen,
Chun-Hao Teng,
Sheng-Nan Wu,
Ruey-Jen Sung:
Reliability Analysis of Physiological Phenomena by Cardiac Action Potential Model.
ISCAS 2007: 2890-2893 |
| 5 | EE | Wen-Wen Hsieh,
Po-Yuan Chen,
Chun-Yao Wang,
TingTing Hwang:
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2222-2227 (2007) |
| 2006 |
|---|
| 4 | EE | Yu-Hui Huang,
Po-Yuan Chen,
TingTing Hwang:
Switching-activity driven gate sizing and Vth assignment for low power design.
ASP-DAC 2006: 576-581 |
| 3 | EE | Wen-Wen Hsieh,
Po-Yuan Chen,
TingTing Hwang:
A bus architecture for crosstalk elimination in high performance processor design.
CODES+ISSS 2006: 247-252 |
| 2 | EE | Tai-Yi Huang,
Chih-Chieh Chou,
Po-Yuan Chen:
Bounding DMA Interference on Hard-Real-Time Embedded Systems.
J. Inf. Sci. Eng. 22(5): 1229-1247 (2006) |
| 2003 |
|---|
| 1 | EE | Tai-Yi Huang,
Chih-Chieh Chou,
Po-Yuan Chen:
Bounding the Execution Times of DMA I/O Tasks on Hard-Real-Time Embedded Systems.
RTCSA 2003: 499-512 |
