| 2007 |
|---|
| 6 | EE | Hongliang Chang,
Sachin S. Sapatnekar:
Prediction of leakage power under process uncertainties.
ACM Trans. Design Autom. Electr. Syst. 12(2): (2007) |
| 2005 |
|---|
| 5 | EE | Hongliang Chang,
Sachin S. Sapatnekar:
Full-chip analysis of leakage power under process variations, including spatial correlations.
DAC 2005: 523-528 |
| 4 | EE | Hongliang Chang,
Vladimir Zolotov,
Sambasivan Narayan,
Chandu Visweswariah:
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions.
DAC 2005: 71-76 |
| 3 | EE | Hongliang Chang,
Sachin S. Sapatnekar:
Statistical timing analysis under spatial correlations.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1467-1482 (2005) |
| 2004 |
|---|
| 2 | EE | Hongliang Chang,
Haifeng Qian,
Sachin S. Sapatnekar:
The Certainty of Uncertainty: Randomness in Nanometer Design.
PATMOS 2004: 36-47 |
| 2003 |
|---|
| 1 | EE | Hongliang Chang,
Sachin S. Sapatnekar:
Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal.
ICCAD 2003: 621-626 |
