Bradley S. Carlson

2001
17	EE	Bradley S. Carlson: Principles vs. Practices in Undergraduate Microelectronic Systems Education. MSE 2001: 22-23
2000
16	EE	Hung-Jung Chen, Bradley S. Carlson: Power estimation for a submicron CMOS inverter driving a CRC interconnect load. ACM Great Lakes Symposium on VLSI 2000: 162-166
1999
15	EE	Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian: Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology. Discrete Applied Mathematics 90(1-3): 89-114 (1999)
1997
14		Zhang Zhu, Bradley S. Carlson: Critical Voltage Transition Logic: An Ultrafast CMOS Logic Family. ICCD 1997: 732-737
13	EE	Maciek Kormicki, Ausif Mahmood, Bradley S. Carlson: Parallel logic simulation on a network of workstations using parallel virtual machine. ACM Trans. Design Autom. Electr. Syst. 2(2): 123-134 (1997)
12		N. W. Lo, Bradley S. Carlson, D. L. Tao: Fault Tolerant Algorithms for Broadcasting on the Star Graph Network. IEEE Trans. Computers 46(12): 1357-1362 (1997)
1996
11	EE	Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian: Transistor Chaining in CMOS Leaf Cells of Planar Topology. Great Lakes Symposium on VLSI 1996: 194-199
1995
10	EE	Harry Hollander, Bradley S. Carlson, Toby D. Bennett: Synthesis of SEU-tolerant ASICs using concurrent error correction. Great Lakes Symposium on VLSI 1995: 90-93
9	EE	Bradley S. Carlson, Suh-Juch Lee: Delay optimization of digital CMOS VLSI circuits by transistor reordering. IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1183-1192 (1995)
8	EE	Qinghong Wu, C. Y. Roger Chen, Bradley S. Carlson: LILA: layout generation for iterative logic arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 14(11): 1359-1369 (1995)
7	EE	C. Y. Roger Chen, Cliff Yungchin Hou, Bradley S. Carlson: A preprocessor for improving channel routing hierarchical pin permutation. IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 896-903 (1995)
6	EE	Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian: Dual Eulerian Properties of Plane Multigraphs. SIAM J. Discrete Math. 8(1): 33-50 (1995)
1994
5		Yuan Hu, Bradley S. Carlson: Improved Lower Bounds for the Scheduling Optimization Problem. ISCAS 1994: 295-298
4		Yuan Hu, Bradley S. Carlson: A Unified Algorithm for Estimation and Scheduling in Data Path Synthesis. ISCAS 1994: 57-60
1993
3	EE	Bradley S. Carlson, C. Y. Roger Chen: Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering. DAC 1993: 361-366
2		Yuan Hu, Ahmed Ghouse, Bradley S. Carlson: Lower Bounds on the Iteration Time and the Number of Resources for Functional Pipelined Data Flow Graphs. ICCD 1993: 21-24
1991
1	EE	Bradley S. Carlson, C. Y. Roger Chen, Uminder Singh: Optimal cell generation for dual independent layout styles. IEEE Trans. on CAD of Integrated Circuits and Systems 10(6): 770-782 (1991)

Coauthor Index

1	Toby D. Bennett	[10]
2	C. Y. Roger Chen	[1] [3] [6] [7] [8] [11] [15]
3	Hung-Jung Chen	[16]
4	Ahmed Ghouse	[2]
5	Harry Hollander	[10]
6	Cliff Yungchin Hou	[7]
7	Yuan Hu	[2] [4] [5]
8	Maciek Kormicki	[13]
9	Suh-Juch Lee	[9]
10	N. W. Lo	[12]
11	Ausif Mahmood	[13]
12	Dikran S. Meliksetian	[6] [11] [15]
13	Uminder Singh	[1]
14	D. L. Tao	[12]
15	Qinghong Wu	[8]
16	Zhang Zhu	[14]

Colors in the list of coauthors