| |
| 2003 | ||
|---|---|---|
| 1 | EE | Xiaofang Gao, Juin J. Liou, Joe Bernier, Gregg Croft, Waisum Wong, Satya Vishwanathan: Optimization of on-chip ESD protection structures for minimal parasitic capacitance. Microelectronics Reliability 43(5): 725-733 (2003) |
| 1 | Joe Bernier | [1] |
| 2 | Gregg Croft | [1] |
| 3 | Xiaofang Gao | [1] |
| 4 | Juin J. Liou | [1] |
| 5 | Satya Vishwanathan | [1] |