Nithya Raghavan
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1999
1
EE
Nithya Raghavan,
Venkatesh Akella
,
Smita Bakshi
: Automatic Insertion of Gated Clocks at Register Transfer Level.
VLSI Design 1999
: 48-54
Coauthor
Index
1
Venkatesh Akella
[
1
]
2
Smita Bakshi
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
