| 2008 |
|---|
| 7 | EE | O. Sarbishei,
Bijan Alizadeh,
Masahiro Fujita:
Arithmetic Circuits Verification without Looking for Internal Equivalences.
MEMOCODE 2008: 7-16 |
| 2007 |
|---|
| 6 | EE | Bijan Alizadeh,
Masahiro Fujita:
Automatic Merge-Point Detection for Sequential Equivalence Checking of System-Level and RTL Descriptions.
ATVA 2007: 129-144 |
| 2006 |
|---|
| 5 | EE | Bijan Alizadeh:
Word level functional coverage computation.
ASP-DAC 2006: 7-12 |
| 2005 |
|---|
| 4 | EE | Arash Hooshmand,
Saeed Shamshiri,
Mohammad Alisafaee,
Bijan Alizadeh,
Pejman Lotfi-Kamran,
Mostafa Naderi,
Zainalabedin Navabi:
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams.
ISCAS (1) 2005: 424-427 |
| 2004 |
|---|
| 3 | EE | Bijan Alizadeh,
Zainalabedin Navabi:
Property Checking based on Hierarchical Integer Equations.
ACSD 2004: 26-35 |
| 2 | EE | Bijan Alizadeh,
Zainalabedin Navabi:
Using Integer Equations to Check PSL Properties in RT Level Design.
IWSOC 2004: 83-86 |
| 2003 |
|---|
| 1 | EE | Bijan Alizadeh,
Mohammad Reza Kakoee:
Using Integer Equations for High Level Formal Verification Property Checking.
ISQED 2003: 69-74 |
