2004 |
9 | EE | P. Jensen,
Wolfgang Ecker,
T. Kruse,
Martin Zambaldi:
SystemVerilog: Interface Based Design.
FDL 2004: 505-518 |
8 | EE | Martin Zambaldi,
Wolfgang Ecker:
Extending the RASSP model for Verification.
FDL 2004: 536-544 |
7 | EE | Martin Zambaldi,
Wolfgang Ecker,
T. Kruse,
W. Müller:
The Formal Simulation Semantics of SystemVerilog.
FDL 2004: 568-578 |
6 | EE | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Martin Zambaldi:
Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking.
ISORC 2004: 129-135 |
5 | EE | Martin Zambaldi,
Wolfgang Ecker:
How to Bridge the Gap Between Simulationand Test.
ITC 2004: 1091-1099 |
4 | EE | Martin Zambaldi,
Wolfgang Ecker,
Renate Henftling,
Matthias Bauer:
A Layered Adaptive Verification Platform for Simulation, Test, and Emulation.
IEEE Design & Test of Computers 21(6): 464-471 (2004) |
2003 |
3 | EE | Renate Henftling,
Andreas Zinn,
Matthias Bauer,
Martin Zambaldi,
Wolfgang Ecker:
Re-use-centric architecture for a fully accelerated testbench environment.
DAC 2003: 372-375 |
2 | EE | Renate Henftling,
Andreas Zinn,
Matthias Bauer,
Wolfgang Ecker,
Martin Zambaldi:
Platform-Based Testbench Generation.
DATE 2003: 11038-11045 |
1 | EE | Renate Henftling,
Wolfgang Ecker,
Andreas Zinn,
Martin Zambaldi,
Matthias Bauer:
An Approach for Mixed Coarse-Granular and Fine-Granular Re-Configurable Architectures.
IPDPS 2003: 187 |