1998 | ||
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4 | T. Kimura, T. Yoshida: A Study on a Management Interface for VP Protection Switching. ICCCN 1998: 539-547 | |
1997 | ||
3 | EE | T. Yoshida, H. Katoh, Y. Sakai: Block Matching Motion Estimation Using Block Integration Based on Reliability Metric. ICIP (2) 1997: 152-155 |
2 | EE | K. Sawada, T. Yoshida: Scalable Coding Based on Adaptive Subband for Interlaced Video Sequences. ICIP (2) 1997: 621-624 |
1988 | ||
1 | T. Shimizu, T. Yoshida, Y. Saito, M. Matsuo, T. Enomoto: A 32-bit Microprocessor Based on the TRON Architecture: Design of the GMICRO/100. COMPCON 1988: 30-35 |
1 | T. Enomoto | [1] |
2 | H. Katoh | [3] |
3 | T. Kimura | [4] |
4 | M. Matsuo | [1] |
5 | Y. Saito | [1] |
6 | Y. Sakai | [3] |
7 | K. Sawada | [2] |
8 | T. Shimizu | [1] |