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M. Matsuo

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2002
2 T. Nakamura, M. Matsuo, M. Kubota, K. Koyanagi: Concept, Design, and Implementation of Context-handling Architecture for Adaptive Networking Services. Communications, Internet, and Information Technology 2002: 75-81
1988
1 T. Shimizu, T. Yoshida, Y. Saito, M. Matsuo, T. Enomoto: A 32-bit Microprocessor Based on the TRON Architecture: Design of the GMICRO/100. COMPCON 1988: 30-35

Coauthor Index

1T. Enomoto [1]
2K. Koyanagi [2]
3M. Kubota [2]
4T. Nakamura [2]
5Y. Saito [1]
6T. Shimizu [1]
7T. Yoshida [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)