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| 2002 | ||
|---|---|---|
| 4 | EE | Congguang Yang, Maciej J. Ciesielski: BDS: a BDD-based logic optimization system. IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 866-876 (2002) |
| 2000 | ||
| 3 | EE | Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal: BDS: a BDD-based logic optimization system. DAC 2000: 92-97 |
| 2 | EE | Congguang Yang, Maciej J. Ciesielski: Synthesis for Mixed CMOS/PTl Logic. DATE 2000: 750 |
| 1999 | ||
| 1 | EE | Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal: BDD Decomposition for Efficient Logic Synthesis. ICCD 1999: 626- |
| 1 | Maciej J. Ciesielski | [1] [2] [3] [4] |
| 2 | Vigyan Singhal | [1] [3] |