| 2008 |
|---|
| 7 | EE | Boyuan Yan,
Lingfei Zhou,
Sheldon X.-D. Tan,
Jie Chen,
Bruce McGaughy:
DeMOR: decentralized model order reduction of linear networks with massive ports.
DAC 2008: 409-414 |
| 6 | EE | Boyuan Yan,
Sheldon X.-D. Tan,
Gengsheng Chen,
Lifeng Wu:
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method.
ICCAD 2008: 744-749 |
| 5 | EE | Pu Liu,
Sheldon X.-D. Tan,
Boyuan Yan,
Bruce McGaughy:
An efficient terminal and model order reduction algorithm.
Integration 41(2): 210-218 (2008) |
| 2007 |
|---|
| 4 | EE | Boyuan Yan,
Sheldon X.-D. Tan,
Pu Liu,
Bruce McGaughy:
Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form.
ASP-DAC 2007: 355-360 |
| 3 | EE | Boyuan Yan,
Sheldon X.-D. Tan,
Pu Liu,
Bruce McGaughy:
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits.
DAC 2007: 158-161 |
| 2 | EE | Boyuan Yan,
Pu Liu,
Sheldon X.-D. Tan,
Bruce McGaughy:
Passive Modeling of Interconnects by Waveform Shaping.
ISQED 2007: 356-361 |
| 1 | EE | Ning Mi,
Boyuan Yan,
Sheldon X.-D. Tan,
Jeffrey Fan,
Hao Yu:
General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits.
ISQED 2007: 633-638 |
