dblp.uni-trier.dewww.uni-trier.de

Kenta Yamada

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
3EEKenta Yamada, Noriaki Oda: Statistical Corner Conditions of Interconnect Delay (Corner LPE Specifications). IEICE Transactions 91-C(4): 562-570 (2008)
2007
2EENoriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno: Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation. IEICE Transactions 90-C(4): 848-855 (2007)
2006
1EEKenta Yamada, Noriaki Oda: Statistical corner conditions of interconnect delay (corner LPE specifications). ASP-DAC 2006: 706-711

Coauthor Index

1Yoshihiro Hayashi [2]
2Hironori Imura [2]
3Yumi Kakuhara [2]
4Naoyoshi Kawahara [2]
5Hiroyuki Kunishima [2]
6Noriaki Oda [1] [2] [3]
7Sadayuki Ohnishi [2]
8Makoto Sekine [2]
9Shuji Sone [2]
10Masayoshi Tagami [2]
11Kazuyoshi Ueno [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)