Hironori Imura

2007
1	EE	Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno: Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation. IEICE Transactions 90-C(4): 848-855 (2007)

Coauthor Index

1	Yoshihiro Hayashi	[1]
2	Yumi Kakuhara	[1]
3	Naoyoshi Kawahara	[1]
4	Hiroyuki Kunishima	[1]
5	Noriaki Oda	[1]
6	Sadayuki Ohnishi	[1]
7	Makoto Sekine	[1]
8	Shuji Sone	[1]
9	Masayoshi Tagami	[1]
10	Kazuyoshi Ueno	[1]
11	Kenta Yamada	[1]