| 2008 |
|---|
| 5 | EE | Roshan Weerasekera,
Dinesh Pamunuwa,
Li-Rong Zheng,
Hannu Tenhunen:
Minimal-Power, Delay-Balanced Smart Repeaters for Global Interconnects in the Nanometer Regime.
IEEE Trans. VLSI Syst. 16(5): 589-593 (2008) |
| 2007 |
|---|
| 4 | EE | Roshan Weerasekera,
Li-Rong Zheng,
Dinesh Pamunuwa,
Hannu Tenhunen:
Extending systems-on-chip to the third dimension: performance, cost and technological tradeoffs.
ICCAD 2007: 212-219 |
| 3 | EE | Roshan Weerasekera,
Dinesh Pamunuwa,
Li-Rong Zheng,
Hannu Tenhunen:
Delay-Balanced Smart Repeaters for On-Chip Global Signaling.
VLSI Design 2007: 308-313 |
| 2006 |
|---|
| 2 | EE | Roshan Weerasekera,
Dinesh Pamunuwa,
Li-Rong Zheng,
Hannu Tenhunen:
Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime.
SLIP 2006: 113-120 |
| 2005 |
|---|
| 1 | EE | Roshan Weerasekera,
Li-Rong Zheng,
Dinesh Pamunuwa,
Hannu Tenhunen:
Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses.
PATMOS 2005: 277-285 |
