2008 |
7 | EE | Lung-Jen Lee,
Wang-Dauh Tseng,
Rung-Bin Lin:
Power Reduction during Scan Testing Based on Multiple Capture Technique.
IEICE Transactions 91-C(5): 798-805 (2008) |
2007 |
6 | EE | Wang-Dauh Tseng,
Lung-Jen Lee:
Reduction of Power Dissipation during Scan Testing by Test Vector Ordering.
MTV 2007: 15-21 |
5 | EE | Wang-Dauh Tseng:
Generation of Primary Input Blocking Pattern for Power Minimization during Scan Testing.
J. Electronic Testing 23(1): 75-84 (2007) |
2006 |
4 | EE | I-Shyan Hwang,
Meng-Yuan Tu,
Wang-Dauh Tseng,
Zen-Der Shyu:
A novel dynamic fault restoration mechanism using cluster allocation approach in WDM mesh networks.
Computer Communications 29(18): 3921-3932 (2006) |
2002 |
3 | EE | Shuenn-Shi Chen,
Wang-Dauh Tseng,
Jin-Tai Yan,
Sao-Jie Chen:
Printed circuit board routing and package layout codesign.
APCCAS (1) 2002: 155-158 |
1999 |
2 | EE | Wang-Dauh Tseng,
Kuochen Wang:
Fuzzy-based CMOS circuit partitioning in built-in current testing.
IEEE Trans. VLSI Syst. 7(1): 116-120 (1999) |
1996 |
1 | EE | Wang-Dauh Tseng,
Kuochen Wang:
Testable Design and Testing of MCMs Based on Multifrequency Scan.
Asian Test Symposium 1996: 75- |