| 2003 |
|---|
| 6 | EE | Chi-Ming Tsai,
Guang-Wan Liao,
Rung-Bin Lin:
A Low Power-Delay Product Page-Based Address Bus Coding Method.
VLSI Design 2003: 521-526 |
| 2002 |
|---|
| 5 | EE | Rung-Bin Lin,
Chi-Ming Tsai:
Weight-Based Bus-Invert Coding for Low-Power Applications.
VLSI Design 2002: 121-125 |
| 4 | EE | Chi-Ming Tsai,
Kun-Tien Kuo,
Chyi-Hui Hong,
Rung-Bin Lin:
An Adaptive Interconnect-Length Driven Placer.
VLSI Design 2002: 393-398 |
| 3 | EE | Rung-Bin Lin,
Chi-Ming Tsai:
Theoretical analysis of bus-invert coding.
IEEE Trans. VLSI Syst. 10(6): 929-934 (2002) |
| 2001 |
|---|
| 2 | EE | Shun-Ping Chung,
Chi-Ming Tsai:
Random Early Blocking Routing in VP-Based ATM Networks.
ICOIN 2001: 461- |
| 1999 |
|---|
| 1 | EE | Rung-Bin Lin,
Isaac Shuo-Hsiu Chou,
Chi-Ming Tsai:
Benchmark Circuits Improve the Quality of a Standard Cell Library.
ASP-DAC 1999: 173-176 |
