Jim Torresen

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33EEMarcus Furuholmen, Kyrre Glette, Jim Torresen, Mats Høvin: Indirect Online Evolution - A Conceptual Framework for Adaptation in Industrial Robotic Systems. ICES 2008: 165-176
32EEKyrre Glette, Jim Torresen, Paul Kaufmann, Marco Platzner: A Comparison of Evolvable Hardware Architectures for Classification Tasks. ICES 2008: 22-33
31EEJim Torresen: Incremental evolution of a signal classification hardware architecture for prosthetic hand control. KES Journal 12(3): 187-199 (2008)
30EEAleksander Paus, Jim Torresen, Mats Høvin: Adaptive Facial Behaviour using Selected Machine Learning Methods. AHS 2007: 225-232
29EEKyrre Glette, Jim Torresen, Moritoshi Yasunaga: Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA. AHS 2007: 463-470
28 Jim Torresen, Thor Arne Lovland: Parts Obsolescence Challenges for the Electronics Industry. DDECS 2007: 131-134
27 Jim Torresen, Jorgen Norendal, Kyrre Glette: Establishing a New Course in Reconfigurable Logic System Design. DDECS 2007: 227-230
26EEKyrre Glette, Jim Torresen, Moritoshi Yasunaga: An Online EHW Pattern Recognition System Applied to Face Image Recognition. EvoWorkshops 2007: 271-280
25EEKyrre Glette, Jim Torresen, Moritoshi Yasunaga: An Online EHW Pattern Recognition System Applied to Sonar Spectrum Classification. ICES 2007: 1-12
24EEJim Torresen, Kyrre Glette: Improving Flexibility in On-Line Evolvable Systems by Reconfigurable Computing. ICES 2007: 391-402
23EEKyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yoshiki Yamaguchi: On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition. AHS 2006: 373-380
22EEJim Torresen, Jonas Jakobsen: An FPGA Implemented Processor Architecture with Adaptive Resolution. AHS 2006: 386-389
21EEKyrre Glette, Jim Torresen: A Flexible On-Chip Evolution System Implemented on a Xilinx Virtex-II Pro Device. ICES 2005: 66-75
20EEJim Torresen: Exploring Knowledge Schemes for Efficient Evolution of Hardware. Evolvable Hardware 2004: 209-216
19EEJim Torresen: An Evolvable Hardware Tutorial. FPL 2004: 821-830
18EEJim Torresen, Jorgen W. Bakke, Lukás Sekanina: Recognizing Speed Limit Sign Numbers by Evolvable Hardware. PPSN 2004: 682-691
17 Andrew M. Tyrrell, Pauline C. Haddow, Jim Torresen: Evolvable Systems: From Biology to Hardware, 5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings Springer 2003
16EEKnut Arne Vinger, Jim Torresen: Implementing Evolution of FIR-Filters Efficiently in an FPGA. Evolvable Hardware 2003: 26-32
15EEShaomeng Li, Jim Torresen, Oddvar Søråsen: Exploiting Reconfigurable Hardware for Network Security. FCCM 2003: 292-293
14EEShaomeng Li, Jim Torresen, Oddvar Søråsen: Exploiting Stateful Inspection of Network Security in Reconfigurable Hardware. FPL 2003: 1153-1157
13EEJim Torresen: Evolving Multiplier Circuits by Training Set and Training Vector Partitioning. ICES 2003: 228-237
12 Jim Torresen, Knut Arne Vinger: High Performance Computing by Context Switching Reconfigurable Logic. ESM 2002: 207-210
11 Jim Torresen, Vidar Engh Skangen: A Signal Processing Architecture Based on RAM Technology. ESM 2002: 317-319
10 Lukás Sekanina, Jim Torresen: Detection of Norwegian Speed Limit Signs. ESM 2002: 337-340
9 Jim Torresen: Evolving both Hardware Subsystems and the Selection of Variants of such into an Assembled System. ESM 2002: 451-457
8EEJim Torresen: A Dynamic Fitness Function Applied to Improve the Generalisation when Evolving a Signal Processing Hardware Architecture. EvoWorkshops 2002: 267-279
7 Jim Torresen: A Scalable Approach to Evolvable Hardware. Genetic Programming and Evolvable Machines 3(3): 259-282 (2002)
6EEJim Torresen: Two-Step Incremental Evolution of a Prosthetic Hand Controller Based on Digital Logic Gates. ICES 2001: 1-13
5EEJim Torresen: Scalable Evolvable Hardware Applied to Road Image Recognition. Evolvable Hardware 2000: 245-252
4EEJim Torresen: Possibilities and Limitations of Applying Evolvable Hardware to Real-World Applications. FPL 2000: 230-239
3EEJim Torresen: A Divide-and-Conquer Approach to Evolvable Hardware. ICES 1998: 57-65
2 Jim Torresen, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk: Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications. ISHPC 1997: 405-414
1EEJim Torresen: The Convergence of Backpropagation Trained Neural Networks for Various Weight Update Frequencies. Int. J. Neural Syst. 8(3): 263-277 (1997)

Coauthor Index

1Jorgen W. Bakke [18]
2Marcus Furuholmen [33]
3Kyrre Glette [21] [23] [24] [25] [26] [27] [29] [32] [33]
4Pauline C. Haddow [17]
5Mats Erling Høvin (Mats Høvin) [30] [33]
6Jonas Jakobsen [22]
7Paul Kaufmann [32]
8Olav Landsverk [2]
9Shaomeng Li [14] [15]
10Thor Arne Lovland [28]
11Shin-ichiro Mori [2]
12Hiroshi Nakashima [2]
13Jorgen Norendal [27]
14Aleksander Paus [30]
15Marco Platzner [32]
16Lukás Sekanina [10] [18]
17Vidar Engh Skangen [11]
18Oddvar Søråsen [14] [15]
19Shinji Tomita [2]
20Andrew M. Tyrrell (Andy M. Tyrrell) [17]
21Knut Arne Vinger [12] [16]
22Yoshiki Yamaguchi [23]
23Moritoshi Yasunaga [23] [25] [26] [29]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)