| |
| 2008 | ||
|---|---|---|
| 2 | EE | Yu-Shih Su, Po-Hsien Chang, Shih-Chieh Chang, TingTing Hwang: Synthesis of a novel timing-error detection architecture. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008) |
| 2007 | ||
| 1 | EE | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska: An Efficient Mechanism for Performance Optimization of Variable-Latency Designs. DAC 2007: 976-981 |
| 1 | Po-Hsien Chang | [2] |
| 2 | Shih-Chieh Chang | [1] [2] |
| 3 | TingTing Hwang | [2] |
| 4 | Malgorzata Marek-Sadowska | [1] |
| 5 | Da-Chung Wang | [1] |