| 2006 |
|---|
| 10 | EE | Tony F. Chan,
Jason Cong,
Joseph R. Shinnerl,
Kenton Sze,
Min Xie:
mPL6: enhanced multilevel mixed-size placement.
ISPD 2006: 212-214 |
| 9 | EE | Jason Cong,
Michail Romesis,
Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1719-1732 (2006) |
| 2005 |
|---|
| 8 | EE | Jason Cong,
Michail Romesis,
Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning.
ASP-DAC 2005: 1119-1122 |
| 7 | | Jason Cong,
Michail Romesis,
Joseph R. Shinnerl:
Robust mixed-size placement under tight white-space constraints.
ICCAD 2005: 165-172 |
| 6 | EE | Tony F. Chan,
Jason Cong,
Michail Romesis,
Joseph R. Shinnerl,
Kenton Sze,
Min Xie:
mPL6: a robust multilevel mixed-size placement engine.
ISPD 2005: 227-229 |
| 5 | EE | Jason Cong,
Joseph R. Shinnerl,
Min Xie,
Tim Kong,
Xin Yuan:
Large-scale circuit placement.
ACM Trans. Design Autom. Electr. Syst. 10(2): 389-430 (2005) |
| 2004 |
|---|
| 4 | EE | Jason Cong,
Gabriele Nataneli,
Michail Romesis,
Joseph R. Shinnerl:
An area-optimality study of floorplanning.
ISPD 2004: 78-83 |
| 2003 |
|---|
| 3 | EE | Tony F. Chan,
Jason Cong,
Tim Kong,
Joseph R. Shinnerl,
Kenton Sze:
An Enhanced Multilevel Algorithm for Circuit Placement.
ICCAD 2003: 299-306 |
| 2 | EE | Jason Cong,
Tim Kong,
Joseph R. Shinnerl,
Min Xie,
Xin Yuan:
Large-Scale Circuit Placement: Gap and Promise.
ICCAD 2003: 883-890 |
| 2000 |
|---|
| 1 | | Tony F. Chan,
Jason Cong,
Tianming Kong,
Joseph R. Shinnerl:
Multilevel Optimization for Large-Scale Circuit Placement.
ICCAD 2000: 171-176 |
