| 2002 |
|---|
| 8 | EE | Dinesh Ramanathan,
Sandy Irani,
Rajesh K. Gupta:
An analysis of system level power management algorithms and theireffects on latency.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(3): 291-305 (2002) |
| 2000 |
|---|
| 7 | EE | Dinesh Ramanathan,
Ravindra Jejurikar,
Rajesh K. Gupta:
Timing driven co-design of networked embedded systems.
ASP-DAC 2000: 117-122 |
| 6 | EE | Dinesh Ramanathan,
Rajesh K. Gupta:
System Level Online Power Management Algorithms.
DATE 2000: 606-605 |
| 5 | | Dinesh Ramanathan,
Sandy Irani,
Rajesh K. Gupta:
Latency Effects of System Level Power Management Algorithms.
ICCAD 2000: 350-356 |
| 4 | EE | Dinesh Ramanathan,
Rajesh K. Gupta,
Raymond Roth:
Interfacing Hardware and Software Using C++ Class Libraries.
ICCD 2000: 445- |
| 1999 |
|---|
| 3 | EE | Dinesh Ramanathan,
Ali Dasdan,
Rajesh K. Gupta:
Timing-driven HW/SW codesign based on task structuring and process timing simulation.
CODES 1999: 203-207 |
| 1998 |
|---|
| 2 | EE | Ali Dasdan,
Dinesh Ramanathan,
Rajesh K. Gupta:
Rate Derivation and Its Applications to Reactive, Real-Time Embedded Systems.
DAC 1998: 263-268 |
| 1 | EE | Ali Dasdan,
Dinesh Ramanathan,
Rajesh K. Gupta:
A timing-driven design and validation methodology for embedded real-time systems.
ACM Trans. Design Autom. Electr. Syst. 3(4): 533-553 (1998) |
