Bill Pontikakis

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4EEBill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria: A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. ISCAS 2007: 633-636
3EEBill Pontikakis, François R. Boyer, Yvon Savaria: A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. ISCAS 2006
2EEBill Pontikakis, François R. Boyer, Yvon Savaria: Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period. IWSOC 2005: 454-458
1EEBill Pontikakis, Mohamed Nekili: A novel double edge-triggered pulse-clocked TSPC D flip-flop for high-performance and low-power VLSI design applications. ISCAS (5) 2002: 101-104

Coauthor Index

1François R. Boyer [2] [3] [4]
2Hung Tien Bui [4]
3Mohamed Nekili [1]
4Yvon Savaria [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)