| 2006 |
|---|
| 3 | EE | Ondrej Novák,
Zdenek Plíva,
Jiri Jenícek,
Zbynek Mader,
Michal Jarkovský:
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead.
DFT 2006: 300-308 |
| 2005 |
|---|
| 2 | EE | Ondrej Novák,
Jirí Zahrádka,
Zdenek Plíva:
COMPAS - Compressed Test Pattern Sequencer for Scan Based Circuits.
EDCC 2005: 403-414 |
| 2004 |
|---|
| 1 | EE | Ondrej Novák,
Zdenek Plíva,
Jiri Nosek,
Andrzej Hlawiczka,
Tomasz Garbolino,
Krzysztof Gucwa:
Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor.
J. Electronic Testing 20(1): 109-122 (2004) |
