| 1991 |
|---|
| 6 | EE | William M. Coughran Jr.,
Mark R. Pinto,
R. Kent Smith:
Adaptive grid generation for VSLI device simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1259-1275 (1991) |
| 1989 |
|---|
| 5 | EE | Franco Venturi,
R. Kent Smith,
Enrico Sangiorgi,
Mark R. Pinto,
Bruno Riccò:
A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(4): 360-369 (1989) |
| 1988 |
|---|
| 4 | EE | William M. Coughran Jr.,
Mark R. Pinto,
R. Kent Smith:
Computation of steady-state CMOS latchup characteristics.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(2): 307-323 (1988) |
| 1987 |
|---|
| 3 | EE | Hiroshi Iwai,
Mark R. Pinto,
Conor S. Rafferty,
J. E. Oristian,
Robert W. Dutton:
Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(2): 173-184 (1987) |
| 1985 |
|---|
| 2 | EE | Conor S. Rafferty,
Mark R. Pinto,
Robert W. Dutton:
Iterative Methods in Semiconductor Device Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 462-471 (1985) |
| 1 | EE | Enrico Sangiorgi,
Mark R. Pinto,
Stanley E. Swirhun,
Robert W. Dutton:
Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 561-574 (1985) |
