Yoshihiro Nakatani

2006
3	EE	Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama: Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal. IPDPS 2006
2	EE	Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama: Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals. ISMVL 2006: 17
2005
1		Takeaki Sugimura, Yuta Konishi, Yoshihiro Nakatani, Takafumi Fukushima, Hiroyuki Kurino, Mitsumasa Koyanagi: Dynamic Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure. ARCS Workshops 2005: 27-32

Coauthor Index

1	Takafumi Fukushima	[1]
2	Masanori Hariyama	[2] [3]
3	Michitaka Kameyama	[2] [3]
4	Yuta Konishi	[1]
5	Mitsumasa Koyanagi	[1]
6	Hiroyuki Kurino	[1]
7	Takeaki Sugimura	[1]

Colors in the list of coauthors