| 1988 |
|---|
| 3 | | M. Melgara,
M. Battu,
P. Garino,
J. Dowe,
Y. J. Vernay,
M. Marzouki,
F. Boland:
Automatic Location of IC Design Errors Using Beam System.
ITC 1988: 898-907 |
| 1986 |
|---|
| 2 | | Ioannis Stamelos,
M. Melgara,
M. Paolini,
S. Morpurgo,
C. Segre:
A Multi-Level Test Pattern Generation and Validation Environment.
ITC 1986: 90-96 |
| 1984 |
|---|
| 1 | | M. Melgara,
M. Paolini,
R. Roncella,
S. Morpurgo:
CVT-FERT : Automatic Generator of Analytical Faults at Register Transfer Level from Electrical and Topological Descriptions.
ITC 1984: 250-257 |
