| |
| 1988 | ||
|---|---|---|
| 1 | M. Melgara, M. Battu, P. Garino, J. Dowe, Y. J. Vernay, M. Marzouki, F. Boland: Automatic Location of IC Design Errors Using Beam System. ITC 1988: 898-907 | |
| 1 | M. Battu | [1] |
| 2 | F. Boland | [1] |
| 3 | J. Dowe | [1] |
| 4 | M. Marzouki | [1] |
| 5 | M. Melgara | [1] |
| 6 | Y. J. Vernay | [1] |