| 1999 |
|---|
| 4 | EE | Enrica Filippi,
A. Montanaro,
M. Paolini,
M. Turolla:
FPGA Design Experiences Using the CSELT VIP (TM) Library.
FPGA 1999: 248 |
| 1998 |
|---|
| 3 | EE | Enrica Filippi,
Luciano Lavagno,
L. Licciardi,
A. Montanaro,
M. Paolini,
Roberto Passerone,
Marco Sgroi,
Alberto L. Sangiovanni-Vincentelli:
Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study.
ISSS 1998: 37-42 |
| 1986 |
|---|
| 2 | | Ioannis Stamelos,
M. Melgara,
M. Paolini,
S. Morpurgo,
C. Segre:
A Multi-Level Test Pattern Generation and Validation Environment.
ITC 1986: 90-96 |
| 1984 |
|---|
| 1 | | M. Melgara,
M. Paolini,
R. Roncella,
S. Morpurgo:
CVT-FERT : Automatic Generator of Analytical Faults at Register Transfer Level from Electrical and Topological Descriptions.
ITC 1984: 250-257 |
