| 2008 |
|---|
| 5 | EE | Peter Malík,
Marcel Baláz,
Martin Simlastík,
Arkadiusz W. Luczyk,
Witold A. Pleskacz:
Various MDCT implementations in 0.35µm CMOS.
DDECS 2008: 170-173 |
| 2007 |
|---|
| 4 | | Peter Malík,
Marcel Baláz,
Tomás Pikula,
Martin Simlastík:
An Improved MDCT IP Core Generator with Architectural Model Simulation.
DDECS 2007: 193-198 |
| 3 | | Martin Simlastík,
Viera Stopjaková,
Libor Majer,
Peter Malík:
Clockless Implementation of LEON2 for Low-Power Applications.
DDECS 2007: 215-218 |
| 2006 |
|---|
| 2 | | Martin Simlastík,
Peter Malík,
Tomás Pikula,
Marcel Baláz:
FPGA Implementation of a Fast MDCT Algorithm.
DDECS 2006: 228-229 |
| 1 | EE | Peter Malík,
Marcel Baláz,
Tomás Pikula,
Martin Simlastík:
MDCT IP Core Generator with Architectural Model Simulation.
VLSI-SoC 2006: 18-23 |
