Gerald G. Lopez

List of publications from the DBLP Bibliography Server - FAQ

2007

3 EE Ajay Joshi, Gerald G. Lopez, Jeffrey A. Davis: Design and Optimization of On-Chip Interconnects Using Wave-Pipelined Multiplexed Routing. IEEE Trans. VLSI Syst. 15(9): 990-1002 (2007)

2005

2 EE Gerald G. Lopez, Giovanni Fiorenza, Thomas J. Bucelot, Phillip Restle, Mary Yvonne Lanzerotti: Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution. ACM Great Lakes Symposium on VLSI 2005: 38-43

2000

1 Omid E. Kia, Jafar Vossoughi, Gerald G. Lopez, Saad A. Sirohey: Image-Based Evaluation of Vascular Residual Strain. International Journal on Artificial Intelligence Tools 9(2): 247-263 (2000)

2007
3	EE	Ajay Joshi, Gerald G. Lopez, Jeffrey A. Davis: Design and Optimization of On-Chip Interconnects Using Wave-Pipelined Multiplexed Routing. IEEE Trans. VLSI Syst. 15(9): 990-1002 (2007)
2005
2	EE	Gerald G. Lopez, Giovanni Fiorenza, Thomas J. Bucelot, Phillip Restle, Mary Yvonne Lanzerotti: Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution. ACM Great Lakes Symposium on VLSI 2005: 38-43
2000
1		Omid E. Kia, Jafar Vossoughi, Gerald G. Lopez, Saad A. Sirohey: Image-Based Evaluation of Vascular Residual Strain. International Journal on Artificial Intelligence Tools 9(2): 247-263 (2000)

Coauthor Index

1	Thomas J. Bucelot	[2]
2	Jeffrey A. Davis	[3]
3	Giovanni Fiorenza	[2]
4	Ajay Joshi	[3]
5	Omid E. Kia	[1]
6	Mary Yvonne Lanzerotti	[2]
7	Phillip Restle (Phillip J. Restle)	[2]
8	Saad A. Sirohey	[1]
9	Jafar Vossoughi	[1]