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Yifang Liu

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2008
4EEYifang Liu, Rupesh S. Shelar, Jiang Hu: Delay-optimal simultaneous technology mapping and placement with applications to timing optimization. ICCAD 2008: 101-106
3EEYifang Liu, Jiang Hu, Weiping Shi: Multi-scenario buffer insertion in multi-core processor designs. ISPD 2008: 15-22
2EEJiquan Zhou, Xiangli Liu, Xiaozhong Yang, Yifang Liu: Novel soliton-like and multi-solitary wave solutions of (3 + 1)-dimensional Burgers equation. Applied Mathematics and Computation 204(1): 461-467 (2008)
1EEYifang Liu, Jiang Hu, Weiping Shi: Buffering Interconnect for Multicore Processor Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2183-2196 (2008)

Coauthor Index

1Jiang Hu [1] [3] [4]
2Xiangli Liu [2]
3Rupesh S. Shelar [4]
4Weiping Shi [1] [3]
5Xiaozhong Yang [2]
6Jiquan Zhou [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)