2008 | ||
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4 | EE | Yifang Liu, Rupesh S. Shelar, Jiang Hu: Delay-optimal simultaneous technology mapping and placement with applications to timing optimization. ICCAD 2008: 101-106 |
3 | EE | Yifang Liu, Jiang Hu, Weiping Shi: Multi-scenario buffer insertion in multi-core processor designs. ISPD 2008: 15-22 |
2 | EE | Jiquan Zhou, Xiangli Liu, Xiaozhong Yang, Yifang Liu: Novel soliton-like and multi-solitary wave solutions of (3 + 1)-dimensional Burgers equation. Applied Mathematics and Computation 204(1): 461-467 (2008) |
1 | EE | Yifang Liu, Jiang Hu, Weiping Shi: Buffering Interconnect for Multicore Processor Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2183-2196 (2008) |
1 | Jiang Hu | [1] [3] [4] |
2 | Xiangli Liu | [2] |
3 | Rupesh S. Shelar | [4] |
4 | Weiping Shi | [1] [3] |
5 | Xiaozhong Yang | [2] |
6 | Jiquan Zhou | [2] |