| 2008 |
|---|
| 3 | EE | Chung-Wei Lin,
Szu-Yu Chen,
Chi-Feng Li,
Yao-Wen Chang,
Chia-Lin Yang:
Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning Graphs.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 643-653 (2008) |
| 2007 |
|---|
| 2 | EE | Chi-Feng Li,
Ping-Hung Yuh,
Chia-Lin Yang,
Yao-Wen Chang:
Post-placement leakage optimization for partially dynamically reconfigurable FPGAs.
ISLPED 2007: 92-97 |
| 1 | EE | Chung-Wei Lin,
Szu-Yu Chen,
Chi-Feng Li,
Yao-Wen Chang,
Chia-Lin Yang:
Efficient obstacle-avoiding rectilinear steiner tree construction.
ISPD 2007: 127-134 |
