| 2009 |
|---|
| 12 | EE | Sylvain Collange,
Yoginder S. Dandass,
Marc Daumas,
David Defour:
Using Graphics Processors for Parallelizing Hash-Based Data Carving.
HICSS 2009: 1-10 |
| 11 | EE | Sylvain Collange,
Yoginder S. Dandass,
Marc Daumas,
David Defour:
Using Graphics Processors for Parallelizing Hash-based Data Carving
CoRR abs/0901.1307: (2009) |
| 2008 |
|---|
| 10 | EE | Sylvain Collange,
Marc Daumas,
David Defour:
Line-by-line spectroscopic simulations on graphics processing units.
Computer Physics Communications 178(2): 135-143 (2008) |
| 9 | EE | Sylvain Collange,
Marc Daumas,
David Defour:
État de l'intégration de la virgule flottante dans les processeurs graphiques.
Technique et Science Informatiques 27(6): 719-733 (2008) |
| 2007 |
|---|
| 8 | EE | Sylvain Collange,
Marc Daumas,
David Defour:
Graphic processors to speed-up simulations for the design of high performance solar receptors.
ASAP 2007: 377-382 |
| 7 | EE | Sylvain Collange,
Marc Daumas,
David Defour:
Graphic processors to speed-up simulations for the design of high performance solar receptors
CoRR abs/cs/0703028: (2007) |
| 2006 |
|---|
| 6 | EE | Guillaume Da Graça,
David Defour:
Implementation of float-float operators on graphics hardware
CoRR abs/cs/0603115: (2006) |
| 5 | EE | Marc Daumas,
Guillaume Da Graça,
David Defour:
Caractéristiques arithmétiques des processeurs graphiques
CoRR abs/cs/0605081: (2006) |
| 4 | EE | Bernard Goossens,
David Defour:
Ordonnancement distribué d'instructions.
Technique et Science Informatiques 25(7): 827-844 (2006) |
| 2005 |
|---|
| 3 | EE | Bernard Goossens,
David Defour:
The instruction register file micro-architecture.
Future Generation Comp. Syst. 21(4): 767-773 (2005) |
| 2 | EE | Nicolas Brisebarre,
David Defour,
Peter Kornerup,
Jean-Michel Muller,
Nathalie Revol:
A New Range-Reduction Algorithm.
IEEE Trans. Computers 54(3): 331-339 (2005) |
| 2003 |
|---|
| 1 | EE | David Defour,
Florent de Dinechin:
Software Carry-Save: A Case Study for Instruction-Level Parallelism.
PaCT 2003: 207-214 |
