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Seok-Yoon Kim

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2006
9EEJoong-ho Park, Bang-Hyun Sung, Seok-Yoon Kim: An Efficient Estimation Method of Dynamic Power Dissipation on VLSI Interconnects. ARC 2006: 65-74
8EEKi-Young Kim, Seung-Yong Kim, Seok-Yoon Kim: An Efficient Delay Metric on RC Interconnects Under Saturated Ramp Inputs. ICCSA (4) 2006: 612-621
2001
7EESeung-Ho Jung, Jong-Humn Baek, Seok-Yoon Kim: Short circuit power estimation of static CMOS circuits. ASP-DAC 2001: 545-550
1996
6EERohini Gupta, Seok-Yoon Kim, Lawrence T. Pileggi: Domain characterization of transmission line models and analyses. IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 184-193 (1996)
1994
5 Rohini Gupta, Seok-Yoon Kim, Lawrence T. Pillage: Domain Characterization of Transmission Line Models for Efficient Simulation. ICCD 1994: 558-562
4EESeok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage: Time-domain macromodels for VLSI interconnect analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 13(10): 1257-1270 (1994)
3EEDemos F. Anastasakis, Nanda Gopal, Seok-Yoon Kim, Lawrence T. Pillage: Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications. IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 729-736 (1994)
1992
2EEDemos F. Anastasakis, Nanda Gopal, Seok-Yoon Kim, Lawrence T. Pillage: On the Stability of Moment-Matching Approximations in Asymptotic Waveform Evaluation. DAC 1992: 207-212
1EESeok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage: AWE macromodels of VLSI interconnect for circuit simulation. ICCAD 1992: 64-70

Coauthor Index

1Demos F. Anastasakis [2] [3]
2Jong-Humn Baek [7]
3Nanda Gopal [1] [2] [3] [4]
4Rohini Gupta [5] [6]
5Seung-Ho Jung [7]
6Ki-Young Kim [8]
7Seung-Yong Kim [8]
8Joong-ho Park [9]
9Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) [1] [2] [3] [4] [5] [6]
10Bang-Hyun Sung [9]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)