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Shoji Kawahara

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2005
4EETaku Ohsawa, Masamichi Takagi, Shoji Kawahara, Satoshi Matsushita: Pinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities. MICRO 2005: 81-92
2003
3 Mikiko Sato, Koichi Sasada, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki: A Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture. PDPTA 2003: 1669-1675
2 Hironori Nakajo, Masanori Yamato, Shoji Kawahara, Norito Kato, Koichi Sasada, Mikiko Sato, Mitaro Namiki: Performance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number. PDPTA 2003: 1775-1781
1 Koichi Sasada, Mikiko Sato, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki: Implementation and Evaluation of a Thread Library for Multithreaded Architecture. PDPTA 2003: 609-615

Coauthor Index

1Norito Kato [1] [2] [3]
2Satoshi Matsushita [4]
3Hironori Nakajo [1] [2] [3]
4Mitaro Namiki [1] [2] [3]
5Taku Ohsawa [4]
6Koichi Sasada [1] [2] [3]
7Mikiko Sato [1] [2] [3]
8Masamichi Takagi [4]
9Masanori Yamato [1] [2] [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)