| 2008 |
|---|
| 4 | EE | Shuichi Kunie,
Takefumi Hiraga,
Tatsuya Tokue,
Sunao Torii,
Taku Ohsawa:
Low power architecture and design techniques for mobile handset LSI MedityTM M2.
ASP-DAC 2008: 748-753 |
| 2006 |
|---|
| 3 | EE | Masahiro Nomura,
Taku Ohsawa,
Koichi Takeda,
Yoetsu Nakazawa,
Yoshinori Hirota,
Yasuhiko Hagihara,
Naoki Nishi:
An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques.
IEICE Transactions 89-C(3): 334-341 (2006) |
| 2005 |
|---|
| 2 | EE | Taku Ohsawa,
Masamichi Takagi,
Shoji Kawahara,
Satoshi Matsushita:
Pinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities.
MICRO 2005: 81-92 |
| 1998 |
|---|
| 1 | EE | Taku Ohsawa,
Koji Kai,
Kazuaki Murakami:
Optimizing the DRAM refresh count for merged DRAM/logic LSIs.
ISLPED 1998: 82-87 |
