| 2009 |
| 12 | EE | Weirong Jiang,
Viktor K. Prasanna:
Large-scale wire-speed packet classification on FPGAs.
FPGA 2009: 219-228 |
| 2008 |
| 11 | EE | Yi-Hua E. Yang,
Weirong Jiang,
Viktor K. Prasanna:
Compact architecture for high-throughput regular expression matching on FPGA.
ANCS 2008: 30-39 |
| 10 | EE | Weirong Jiang,
Viktor K. Prasanna:
Multi-terabit ip lookup using parallel bidirectional pipelines.
Conf. Computing Frontiers 2008: 241-250 |
| 9 | EE | Hoang Le,
Weirong Jiang,
Viktor K. Prasanna:
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA.
FCCM 2008: 33-42 |
| 8 | EE | Hoang Le,
Weirong Jiang,
Viktor K. Prasanna:
Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA.
FPL 2008: 137-142 |
| 7 | EE | Weirong Jiang,
Viktor K. Prasanna:
Multi-Way Pipelining for Power-Efficient IP Lookup.
GLOBECOM 2008: 2339-243 |
| 6 | EE | Weirong Jiang,
Qingbo Wang,
Viktor K. Prasanna:
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup.
INFOCOM 2008: 1786-1794 |
| 5 | EE | Weirong Jiang,
Viktor K. Prasanna:
Parallel IP lookup using multiple SRAM-based pipelines.
IPDPS 2008: 1-14 |
| 2007 |
| 4 | EE | Zhiming Zhang,
Weirong Jiang,
Yibo Xue:
A Trust Model Based Cooperation Enforcement Mechanism in Mesh Networks.
ICN 2007: 28 |
| 3 | EE | Weirong Jiang,
Yun Zhu,
Zhiming Zhang:
Routing Overhead Minimization in Large-Scale Wireless Mesh Networks.
VTC Spring 2007: 1270-1274 |
| 2006 |
| 2 | EE | Weirong Jiang,
Chao Zhang:
A portable real-time emulator for testing multi-radio MANETs.
IPDPS 2006 |
| 2005 |
| 1 | EE | Weirong Jiang:
Data Structure Optimization of AS_PATH in BGP.
ICCNMC 2005: 781-788 |