2008 |
4 | EE | Takefumi Yoshikawa,
T. Hirata,
Tsuyoshi Ebuchi,
Toru Iwata,
Yukio Arima,
Hiroyuki Yamauchi:
An Over-1-Gb/s Transceiver Core for Integration Into Large System-on-Chips for Consumer Electronics.
IEEE Trans. VLSI Syst. 16(9): 1187-1198 (2008) |
2005 |
3 | EE | Takefumi Yoshikawa,
Tsuyoshi Ebuchi,
Yukio Arima,
Toru Iwata:
A Spread Spectrum Clock Generator Using Digital Tracking Scheme.
IEICE Transactions 88-C(6): 1288-1289 (2005) |
1997 |
2 | EE | Hiroyuki Yamauchi,
Toru Iwata,
Hironori Akamatsu,
Akira Matsuzawa:
A 0.5 V single power supply operated high-speed boosted and offset-grounded data storage (BOGS) SRAM cell architecture.
IEEE Trans. VLSI Syst. 5(4): 377-387 (1997) |
1996 |
1 | EE | Hiroyuki Yamauchi,
Toru Iwata,
Hironori Akamatsu,
Akira Matsuzawa:
A 0.5V/100 MHz over-VCC grounded data storage (OVGS) SRAM cell architecture with boosted bit-line and offset source over-driving schemes.
ISLPED 1996: 49-54 |