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Rickard Holsmark

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2009
9EEMaurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania: Application Specific Routing Algorithms for Networks on Chip. IEEE Trans. Parallel Distrib. Syst. 20(3): 316-330 (2009)
2008
8EEMaurizio Palesi, Giuseppe Longo, Salvatore Signorino, Rickard Holsmark, Shashi Kumar, Vincenzo Catania: Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms. NOCS 2008: 97-106
7EERickard Holsmark, Maurizio Palesi, Shashi Kumar: Deadlock free routing algorithms for irregular mesh topology NoC systems with rectangular regions. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 427-440 (2008)
2007
6EEMaurizio Palesi, Shashi Kumar, Rickard Holsmark, Vincenzo Catania: Exploiting Communication Concurrency for Efficient Deadlock Free Routing in Reconfigurable NoC Platforms. IPDPS 2007: 1-8
5EERickard Holsmark, Shashi Kumar: Corrections to Chen and Chiu's Fault Tolerant Routing Algorithm for Mesh Networks. J. Inf. Sci. Eng. 23(6): 1649-1662 (2007)
2006
4EEMaurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania: A methodology for design of application specific deadlock-free routing algorithms for NoC systems. CODES+ISSS 2006: 142-147
3EERickard Holsmark, Maurizio Palesi, Shashi Kumar: Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions. DSD 2006: 696-703
2EEMaurizio Palesi, Shashi Kumar, Rickard Holsmark: A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures. SAMOS 2006: 373-384
2003
1EERickard Holsmark, Magnus Högberg, Shashi Kumar: Modelling and Evaluation of a Network on Chip Architecture Using SDL. SDL Forum 2003: 166-182

Coauthor Index

1Vincenzo Catania [4] [6] [8] [9]
2Magnus Högberg [1]
3Shashi Kumar [1] [2] [3] [4] [5] [6] [7] [8] [9]
4Giuseppe Longo [8]
5Maurizio Palesi [2] [3] [4] [6] [7] [8] [9]
6Salvatore Signorino [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)