2009 |
9 | EE | Maurizio Palesi,
Rickard Holsmark,
Shashi Kumar,
Vincenzo Catania:
Application Specific Routing Algorithms for Networks on Chip.
IEEE Trans. Parallel Distrib. Syst. 20(3): 316-330 (2009) |
2008 |
8 | EE | Maurizio Palesi,
Giuseppe Longo,
Salvatore Signorino,
Rickard Holsmark,
Shashi Kumar,
Vincenzo Catania:
Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms.
NOCS 2008: 97-106 |
7 | EE | Rickard Holsmark,
Maurizio Palesi,
Shashi Kumar:
Deadlock free routing algorithms for irregular mesh topology NoC systems with rectangular regions.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 427-440 (2008) |
2007 |
6 | EE | Maurizio Palesi,
Shashi Kumar,
Rickard Holsmark,
Vincenzo Catania:
Exploiting Communication Concurrency for Efficient Deadlock Free Routing in Reconfigurable NoC Platforms.
IPDPS 2007: 1-8 |
5 | EE | Rickard Holsmark,
Shashi Kumar:
Corrections to Chen and Chiu's Fault Tolerant Routing Algorithm for Mesh Networks.
J. Inf. Sci. Eng. 23(6): 1649-1662 (2007) |
2006 |
4 | EE | Maurizio Palesi,
Rickard Holsmark,
Shashi Kumar,
Vincenzo Catania:
A methodology for design of application specific deadlock-free routing algorithms for NoC systems.
CODES+ISSS 2006: 142-147 |
3 | EE | Rickard Holsmark,
Maurizio Palesi,
Shashi Kumar:
Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions.
DSD 2006: 696-703 |
2 | EE | Maurizio Palesi,
Shashi Kumar,
Rickard Holsmark:
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures.
SAMOS 2006: 373-384 |
2003 |
1 | EE | Rickard Holsmark,
Magnus Högberg,
Shashi Kumar:
Modelling and Evaluation of a Network on Chip Architecture Using SDL.
SDL Forum 2003: 166-182 |