Peter Hallschmid

2008
5	EE	Peter Hallschmid, Resve Saleh: Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 508-515 (2008)
2007
4	EE	Peter Hallschmid, Resve Saleh: Automatic Cache Tuning for Energy-Efficiency using Local Regression Modeling. DAC 2007: 732-737
2006
3	EE	Peter Hallschmid, Resve Saleh: Fast Configuration of an Energy-Efficient Branch Predictor. ISVLSI 2006: 289-294
2005
2	EE	Peter Hallschmid, Steven J. E. Wilton: Routing architecture optimizations for high-density embedded programmable IP cores. IEEE Trans. VLSI Syst. 13(11): 1320-1324 (2005)
2001
1	EE	Peter Hallschmid, Steven J. E. Wilton: Detailed routing architectures for embedded programmable logic IP cores. FPGA 2001: 69-74

Coauthor Index

1	Resve A. Saleh (Resve Saleh, Res Saleh)	[3] [4] [5]
2	Steven J. E. Wilton	[1] [2]

Colors in the list of coauthors