| 2003 |
|---|
| 3 | EE | Dong Xiang,
Shan Gu,
Hideo Fujiwara:
Non-Scan Design for Testability for Mixed RTL Circuits with Both Data Paths and Controller via Conflict Analysis.
Asian Test Symposium 2003: 300-305 |
| 2 | EE | Dong Xiang,
Shan Gu,
Jia-Guang Sun,
Yu-Liang Wu:
A cost-effective scan architecture for scan testing with non-scan test power and test application cost.
DAC 2003: 744-747 |
| 2002 |
|---|
| 1 | EE | Dong Xiang,
Shan Gu,
Hideo Fujiwara:
Non-Scan Design for Testability Based on Fault Oriented Conflict Analysis.
Asian Test Symposium 2002: 86- |
