2005 |
7 | EE | Gilberto A. Gutiérrez,
Gonzalo Navarro,
Andrea Rodríguez,
Alejandro F. González,
José Orellana:
A spatio-temporal access method based on snapshots and events.
GIS 2005: 115-124 |
2003 |
6 | EE | Alejandro F. González,
Pinaki Mazumder:
Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes.
VLSI Design 2003: 493-492 |
2000 |
5 | EE | Alejandro F. González,
Mayukh Bhattacharya,
Shriram Kulkarni,
Pinaki Mazumder:
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices.
ISMVL 2000: 323- |
4 | EE | Alejandro F. González,
Pinaki Mazumder:
Redundant arithmetic, algorithms and implementations.
Integration 30(1): 13-53 (2000) |
1998 |
3 | EE | Pinaki Mazumder,
Shriram Kulkarni,
Mayukh Bhattacharya,
Alejandro F. González:
Circuit Design using Resonant Tunneling Diodes.
VLSI Design 1998: 501-506 |
2 | | Alejandro F. González,
Pinaki Mazumder:
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices.
IEEE Trans. Computers 47(9): 947-959 (1998) |
1997 |
1 | EE | Alejandro F. González,
Pinaki Mazumder:
Compact Signed-Digit Adder Using Multiple-Valued Logic.
ARVLSI 1997: 96-113 |