| |
| 2004 | ||
|---|---|---|
| 2 | EE | Davide Appello, Alessandra Fudoli, Katia Giarda, Emil Gizdarski, Ben Mathew, Vincenzo Tancorre: Yield Analysis of Logic Circuits. VTS 2004: 103-108 |
| 1 | EE | Davide Appello, Alessandra Fudoli, Katia Giarda, Vincenzo Tancorre, Emil Gizdarski, Ben Mathew: Understanding Yield Losses in Logic Circuits. IEEE Design & Test of Computers 21(3): 208-215 (2004) |
| 1 | Davide Appello | [1] [2] |
| 2 | Alessandra Fudoli | [1] [2] |
| 3 | Emil Gizdarski | [1] [2] |
| 4 | Ben Mathew | [1] [2] |
| 5 | Vincenzo Tancorre | [1] [2] |