| 2006 |
|---|
| 8 | EE | Carsten Albrecht,
Jürgen Foag,
Roman Koch,
Erik Maehle:
DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors.
PDP 2006: 101-108 |
| 7 | EE | Jürgen Foag,
Thomas Wild:
Queuing algorithm for speculative Network Processors.
IJHPCN 4(5/6): 241-247 (2006) |
| 2004 |
|---|
| 6 | | Jürgen Foag,
Thomas Wild:
Queuing Algorithm for Speculative Network Processors.
HPCS 2004: 3-8 |
| 5 | EE | Jürgen Foag:
Speculative Network Processor for Quality-of-Service-Aware Protocol Processing.
NCA 2004: 207-214 |
| 2003 |
|---|
| 4 | EE | Winthir Brunnbauer,
Thomas Wild,
Jürgen Foag,
Nuria Pazos:
A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges.
DSD 2003: 98-103 |
| 3 | EE | Thomas Wild,
Jürgen Foag,
Nuria Pazos,
Winthir Brunnbauer:
Mapping and Scheduling for Architecture Exploration of Networking SoCs.
VLSI Design 2003: 376-381 |
| 2002 |
|---|
| 2 | EE | Jürgen Foag,
Nuria Pazos,
Thomas Wild,
Winthir Brunnbauer:
Self-Adaptive Parallel Processing Architecture For High-speed Networking.
HPCS 2002: 45-52 |
| 1 | EE | Jürgen Foag,
Thomas Wild,
Nuria Pazos,
Winthir Brunnbauer:
Predictive methodology for high-performance networking.
ISCC 2002: 169-174 |
