| 1995 |
|---|
| 7 | EE | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri:
Area efficient computing structures for concurrent error detection in systolic arrays.
VLSI Signal Processing 10(3): 237-260 (1995) |
| 6 | EE | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri,
Dhamin Al-Khalili:
Design techniques for fault-tolerant systolic arrays.
VLSI Signal Processing 11(1-2): 151-168 (1995) |
| 1993 |
|---|
| 5 | | Michael Ogbonna Esonu,
Dhamin Al-Khalili,
Come Rozon:
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits.
ISCAS 1993: 1714-1717 |
| 1992 |
|---|
| 4 | | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri:
Design Methodology for Fault-Tolerant Systolic Array Architectures.
ICPP (2) 1992: 267-274 |
| 1991 |
|---|
| 3 | | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri:
Area Efficient Computing Structures for Concurrent Error Detection in Systolic Architectures.
ICPP (1) 1991: 484-491 |
| 2 | | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri:
On the Design of Optimal Fault-Tolerant Systolic Array Architecures.
IPPS 1991: 352-357 |
| 1990 |
|---|
| 1 | EE | Michael Ogbonna Esonu,
Asim J. Al-Khalili,
Salim Hariri:
Design of optimal systolic arrays: a systematic approach.
SPDP 1990: 166-173 |
