| 2008 |
|---|
| 4 | EE | Chainan Satayapiwat,
Ryusuke Egawa,
Hiroyuki Takizawa,
Hiroaki Kobayashi:
A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation.
ISPA 2008: 252-260 |
| 3 | EE | Akihoro Musa,
Yoshiei Sato,
Takashi Soga,
Ryusuke Egawa,
Hiroyuki Takizawa,
Koki Okabe,
Hiroaki Kobayashi:
Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture.
ISPA 2008: 335-342 |
| 2004 |
|---|
| 2 | EE | Kentaro Sano,
Chiaki Takagi,
Ryusuke Egawa,
Ken-ichi Suzuki,
Tadao Nakamura:
A Systolic Memory Architecture for Fast Codebook Design based on MMPDCL Algorithm.
ITCC (1) 2004: 572-578 |
| 2001 |
|---|
| 1 | EE | Masa-Aki Fukase,
Ryusuke Egawa,
Tomoaki Sato,
Tadao Nakamura:
Scaling Up Of Wave Pipelines.
VLSI Design 2001: 439-445 |
