| |
| 2008 | ||
|---|---|---|
| 2 | EE | Akihoro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi: Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. ISPA 2008: 335-342 |
| 2006 | ||
| 1 | EE | Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi: Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications. ISPA 2006: 845-858 |
| 1 | Ryusuke Egawa | [2] |
| 2 | Hiroaki Kobayashi | [1] [2] |
| 3 | Akihiro Musa | [1] |
| 4 | Akihoro Musa | [2] |
| 5 | Yoshiei Sato | [2] |
| 6 | Takashi Soga | [1] [2] |
| 7 | Hiroyuki Takizawa | [1] [2] |