2007 |
10 | EE | Kentaro Sano,
Takanori Iizuka,
Satoru Yamamoto:
Systolic Architecture for Computational Fluid Dynamics on FPGAs.
FCCM 2007: 107-116 |
2005 |
9 | EE | Takeshi Miura,
Kentaro Sano,
Ken-ichi Suzuki,
Tadao Nakamura:
A Competitive Learning Algorithm with Controlling Maximum Distortion.
JACIII 9(2): 166-174 (2005) |
2004 |
8 | EE | Shintaro Momose,
Kentaro Sano,
K. Suzuki,
Tadao Nakamura:
Parallel competitive learning algorithm for fast codebook design on partitioned space.
CLUSTER 2004: 449-457 |
7 | EE | Kentaro Sano,
Chiaki Takagi,
Ryusuke Egawa,
Ken-ichi Suzuki,
Tadao Nakamura:
A Systolic Memory Architecture for Fast Codebook Design based on MMPDCL Algorithm.
ITCC (1) 2004: 572-578 |
6 | EE | Kentaro Sano,
Shintaro Momose,
Hiroyuki Takizawa,
Hiroaki Kobayashi,
Tadao Nakamura:
Efficient parallel processing of competitive learning algorithms.
Parallel Computing 30(12): 1361-1383 (2004) |
5 | EE | Kentaro Sano,
Yusuke Kobayashi,
Tadao Nakamura:
Differential coding scheme for efficient parallel image composition on a PC cluster system.
Parallel Computing 30(2): 285-299 (2004) |
2003 |
4 | | Hiroyuki Takizawa,
Taira Nakajima,
Kentaro Sano,
Hiroaki Kobayashi:
A Comparison Study of Vector Quantization Codebook Design Algorithms based on the Equidistortion Principle.
Applied Informatics 2003: 255-261 |
2002 |
3 | | Kentaro Sano,
Shintaro Momose,
Hiroyuki Takizawa,
Taira Nakajima,
C. D. Lima,
Hiroaki Kobayashi,
Tadao Nakamura:
Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks.
IASTED PDCS 2002: 578-582 |
2 | | C. D. Lima,
Kentaro Sano,
Tadao Nakamura:
Hardware Support for Concurrent Execution of Loops Containing Loop-carried Data Dependences.
IASTED PDCS 2002: 718-723 |
2001 |
1 | | Hiroaki Kobayashi,
Ken-ichi Suzuki,
Kentaro Sano,
Yoshiyuki Kaeriyama,
Yasumasa Saida,
Nobuyuki Oba,
Tadao Nakamura:
3DCGiRAM: An Intelligent Memory Architecture for Photo-Realistic Image Synthesis.
ICCD 2001: 462-467 |