| |
| 1996 | ||
|---|---|---|
| 2 | EE | L. Desormeaux, V. Szwarc, J. Lodge: A High-Speed, Real-to-Quadrature Converter with Filtering and Decimation. Great Lakes Symposium on VLSI 1996: 252-255 |
| 1994 | ||
| 1 | EE | V. Szwarc, L. Desormeaux, W. Wong, C. P. S. Yeung, C. H. Chan, Tad A. Kwasniewski: A chip set for pipeline and parallel pipeline FFT architectures. VLSI Signal Processing 8(3): 253-265 (1994) |
| 1 | C. H. Chan | [1] |
| 2 | Tad A. Kwasniewski | [1] |
| 3 | J. Lodge | [2] |
| 4 | V. Szwarc | [1] [2] |
| 5 | W. Wong | [1] |
| 6 | C. P. S. Yeung | [1] |