| |
| 2002 | ||
|---|---|---|
| 1 | EE | Ishwar Parulkar, Thomas A. Ziaja, Rajesh Pendurkar, Anand D'Souza, Amitava Majumdar: A Scalable, Low Cost Design-for-Test Architecture for UltraSPARC? Chip Multi-Processors. ITC 2002: 726-735 |
| 1 | Amitava Majumdar | [1] |
| 2 | Ishwar Parulkar | [1] |
| 3 | Rajesh Pendurkar | [1] |
| 4 | Thomas A. Ziaja | [1] |